SSD60N04-12D n-ch enhancement mode power mosfet 53a, 40v, r ds(on) 12m elektronische bauelemente 10-jun-2010 rev.a page 1 of 2 http://www.secosgmbh.com/ any changes of specification will not be informed individually. a c d n o p g e f h k j m b to-252(d-pack) rohs compliant product a suffix of ?-c? specifies halogen free description these miniature surface mount mosfets utilize a high cell density trench process to provide low r ds(on) and to ensure minimal power loss and heat dissipation. typical applications are dc-dc converters and power management in portable and battery-powered products such as computers, printers, pcmcia cards, cellular and cordless telephones. features ? low r ds(on) provides higher efficiency and extends battery life. ? low thermal impedance copper leadframe dpak saves board space. ? fast switching speed. ? high performance trench technology. product summary product summary v ds (v) r ds (on) m( ? ? i d (a) 40 12@v gs = 10v 53 14@v gs = 4.5v 49 absolute maximum ratings (t a = 25 c unless otherwise specified) parameter symbol ratings unit drain-source voltage v ds 40 v gate-source voltage v gs 20 v continuous drain current a i d @t a =25 53 a pulsed drain current b i dm 40 a continuous source current (diode conduction) a i s 30 a total power dissipation a p d @t a =25 50 w operating junction and storage temperature range t j , t stg -55 ~ 175 c thermal resistance ratings maximum thermal resistance junction-ambient a r ja 50 c / w maximum thermal resist ance junction-case r jc 3.0 c / w notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature. ref. millimete r ref. millimete r min. max. min. max. a 6.4 6.8 j 2.30 ref. b 5.20 5.50 k 0.70 0.90 c 2.20 2.40 m 0.50 1.1 d 0.45 0.58 n 0.9 1.6 e 6.8 7.3 o 0 0.15 f 2.40 3.0 p 0.43 0.58 g 5.40 6.2 h 0.8 1.20 ? ? gate ? ? source ? ? drain
SSD60N04-12D n-ch enhancement mode power mosfet 53a, 40v, r ds(on) 12m elektronische bauelemente 10-jun-2010 rev.a page 2 of 2 http://www.secosgmbh.com/ any changes of specification will not be informed individually. electrical characteristics (t a = 25 c unless otherwise specified) parameter symbo min. typ. max. unit test conditions static gate-threshold voltage v gs(th) 1.0 - - v v ds = v gs, i d = 250 a gate-body leakage i gss - - 100 na v ds = 0v, v gs = 20v zero gate voltage drain current i dss - - 1 a v ds = 32v, v gs = 0v - - 25 v ds = 32v, v gs = 0v, t j =55c on-state drain current a i d(on) 34 - - a v ds = 5v, v gs = 10v drain-source on-resistance a r ds(on) - - 12 m ? v gs = 10v, i d = 53 a - - 14 v gs = 4.5v, i d = 49 a forward transconductance a g fs - 22 - s v ds = 15v, i d = 53 a diode forward voltage v sd - 1.1 - v i s = 34 a, v gs = 0 v dynamic b total gate charge q g - 4.0 - nc v ds = 15 v v gs = 4.5 v i d = 53 a gate-source charge q gs - 1.1 - gate-drain charge q gd - 1.4 - turn-on delay time t d(on) - 16 - ns v dd = 25 v i d = 34 a v gen = 10 v r l = 25 ? rise time t r - 5 - turn-off delay time t d(off) - 23 - fall time t f - 3 - notes a. pulse test pulse width Q 300 s, duty cycle Q 2 . b. guaranteed by design, not s ubject to production testing.
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